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The fastest way to reduce multi-rack AI inference latency is to measure the complete path before changing NCCL settings. “Latency” can mean time to first token, inter-token delay, total request time, a point-to-point message delay, a collective-operation delay, or a p99 stall. Each metric can have a different cause. A link can deliver expected bandwidth while retransmissions, congestion, poor NUMA placement, or a cross-rail path produces unacceptable tail latency.
Use the sequence below: define the affected latency metric, test the inter-node fabric independently, verify GPU and host topology, align ranks with nearby CPUs, memory and NICs, then test NCCL and serving-topology changes one at a time. Keep every result tied to message size, traffic pattern, rack path and percentile so an improvement in one benchmark does not hide a regression in production.
Start by naming the latency you are trying to reduce
Do not put one “latency” number on a dashboard and expect it to identify a fault. Distributed inference has several timing domains:
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1Scan for outdated or missing drivers - takes under a minute2Repair Windows errors before they cause bigger problems3Fix the driver behind crashes, sound loss and screen glitches| Metric | What it measures | Typical diagnostic question |
|---|---|---|
| Time to first token (TTFT) | Request arrival until the first generated token | Is queueing, prefill, model loading or a cross-node collective delaying the start? |
| Inter-token latency (ITL) | Time between generated tokens | Are decode-step collectives, cache transfers or synchronization causing stalls? |
| Total response latency | Request arrival until the final token | Is the delay proportional to output length, or is there a fixed setup penalty? |
| Point-to-point network latency | Delay for a controlled message between two endpoints | Does the physical path, congestion or retry behavior add delay independent of the model? |
| Collective latency | Time for operations such as all-reduce, all-gather or reduce-scatter | Are ranks using the expected GPU, NIC and rail topology? |
| Tail latency | High percentiles such as p95 or p99 | Do only some requests encounter queueing, retransmissions, pauses or a congested path? |
Record p50, p95 and p99 request latency, TTFT and ITL where your serving stack exposes them. Segment the records by model, prompt and output size, concurrency, rack and node pair, and serving role (for example, prefill or decode). This prevents an average over short local requests from masking a cross-rack problem.
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For every network result, retain the message size, transport (InfiniBand or RoCE), traffic pattern, number of concurrent flows, source and destination, GPU/NIC pair and inter-rack route. A bandwidth result without those conditions cannot explain a p99 inference stall.
1. Establish a baseline and isolate the symptom
Capture a representative workload
Run a repeatable workload that matches production prompt lengths, output lengths, concurrency and batching. Capture a quiet-period baseline and a busy-period sample. Mark whether the request stayed within one rack or crossed racks. If your service uses disaggregated prefill and decode, label each request with the pool that handled each phase.
Separate queueing from execution
Instrument arrival, scheduler admission, prefill start, first-token emission, each decode step and completion. A long delay before GPU work starts points to routing or queueing; a long TTFT after prefill begins points to model execution, a collective or a cache transfer. A few very slow requests with normal p50 usually require a tail investigation rather than a global bandwidth upgrade.
Freeze the comparison conditions
Before changing a setting, record software versions, GPU count, rank mapping, NIC mapping, link state, switch path and active traffic classes. Compare the same request mix before and after each change. Do not call a change an improvement if it reduces p50 while increasing p99 or ITL variance.
2. Test the inter-node link independently
NVIDIA’s NCCL networking troubleshooting guidance recommends checking link state, link layer and negotiated rate before interpreting NCCL results. Run the checks on both endpoints of a problem path.
Confirm active state and negotiated rate
- For InfiniBand, run
ibstatoribstatusand verify that the expected port is active, uses the intended link layer and reports the expected rate. - For Ethernet or RoCE, verify the interface is up, the expected speed is negotiated and the intended RDMA device is bound to that interface.
- Use
mlxlinkwhere supported to inspect port health, link width and speed. A reduced lane width or speed can create both throughput loss and queueing under load.
Measure bandwidth and point-to-point latency separately
Use ib_write_bw for controlled throughput tests and ib_write_lat for point-to-point latency. Test several message sizes, including the sizes produced by your inference collectives. A large-message bandwidth result does not predict the latency of a one-byte control message or a small decode transfer.
NVIDIA explicitly warns that bandwidth can look healthy while tail latency remains poor. High or unstable latency can indicate congestion, retransmissions or a degraded link. Run the latency test repeatedly and preserve the distribution, not only its minimum. Repeat it with representative competing traffic when the production issue appears only at high utilization.
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Inspect retries, drops and pause behavior
- Use
rdma statisticto inspect RDMA error and retry counters. Counters that increase during the latency spike suggest loss, retries or an unhealthy path. - For InfiniBand, examine port error counters with
perfqueryand useibdiagnetfor fabric-wide topology and routing diagnostics. - For RoCE, inspect NIC statistics with
ethtool -S <interface>. Look for errors, drops, pause frames and Priority Flow Control (PFC)-related events.
Correlate counter changes with the exact timestamp of p99 stalls. A static nonzero counter may reflect historical traffic; a counter that climbs only during the incident is more actionable.
Interpret common outcomes
| Observation | Likely direction | Next check |
|---|---|---|
| Low bandwidth and high latency | Link speed, width, optics, cable, port or congestion problem | Check ibstat/ibstatus, mlxlink, switch counters and the physical path |
| Expected bandwidth but unstable latency | Congestion, retries, pause/PFC behavior or intermittent degradation | Trend RDMA, NIC and switch counters while reproducing the spike |
| Clean link tests but poor NCCL results | GPU topology, rank placement, rail selection or NCCL configuration | Proceed to GPU topology and affinity checks |
| Only one rack pair is slow | Specific uplink, route, optics or switch queue | Compare the affected path with a healthy rack pair using identical message sizes |
3. Verify GPU links and cross-node communication
Do not blame the external fabric until the local GPU paths and the path chosen by each rank are known. NVIDIA’s performance guidance in the NCCL performance and tuning documentation describes the following checks.
Inspect the host topology
- Run
nvidia-smi topo -mto see GPU-to-GPU, GPU-to-CPU and GPU-to-NIC relationships. - Run
nvidia-smi topo -p2p nto verify direct GPU peer paths where they are expected. - Use
nvbandwidthto measure GPU-to-GPU bandwidth and compare local and cross-node paths. The corresponding multinode capability must be compiled or enabled for multinode profiling; a local-only test cannot validate the rack-to-rack path. - Use
nvloomwhen you need an additional topology or link validation view supported by your platform.
Compare these results with the independent RDMA tests. If GPU peer paths or GPU-to-NIC bandwidth are below the platform’s expected behavior, fix topology, firmware, cabling or placement before tuning NCCL. If both GPU and fabric tests are healthy but NCCL remains slow, focus on rank mapping, algorithm selection and configuration.
Read NCCL initialization and topology logs
Enable the NCCL logging needed to see rank-to-device and network selection during a controlled run. Confirm that every rank uses the intended GPU, that the expected NICs are visible and that the selected rings or trees traverse the expected rails. Keep the logs with the benchmark so a later configuration change can be compared against the original mapping.
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4. Align CPU, memory, GPU and NIC locality
Incorrect process placement can seriously affect collective and inference performance even when every link is healthy. On a NUMA host, a rank that runs on a CPU socket remote from its GPU may fetch host memory over an additional inter-socket link; a rank using a NIC remote from its GPU can add another hop before traffic reaches the fabric.
Map the NUMA layout
- Use
lscpu --extended=CPU,NODE,SOCKET,COREto list CPU, NUMA-node, socket and core relationships. - Combine that output with
nvidia-smi topo -mto identify the CPU and NIC nearest to each GPU. - Review the launcher’s CPU affinity, memory policy and rank-to-GPU assignment. Bind each rank to nearby cores and allocate host memory from the corresponding NUMA node.
- For multi-node jobs, keep the rank’s network device aligned with the GPU and rail selected for that rank. Validate the final mapping in NCCL initialization logs.
Test affinity changes under the same request load. A placement that helps a bandwidth-heavy all-reduce may not help a small-message decode workload, so compare both token timing and tail behavior.
5. Match NIC selection and rail behavior to the actual fabric
Multiple NICs do not automatically mean lower latency. Their usefulness depends on whether the system is rail-optimized and whether each NIC reaches an independent path or a shared switch.
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Understand NCCL_CROSS_NIC
NCCL’s NCCL_CROSS_NIC behavior is topology-dependent. In a rail-optimized design, keeping the same ring or tree on the same NIC and rail can avoid flow interference. When NICs connect to a common switch and do not represent isolated rails, allowing cross-NIC use may be appropriate. NVIDIA documents value 2 as the default in NCCL 2.32.3; the correct choice still depends on the deployed topology and workload. See the NCCL environment-variable documentation for the version-specific behavior.
Run a controlled rail experiment
- Document the current NIC order, rank order and physical rail connections.
- Run the representative inference workload with the current setting and save p50/p95/p99 TTFT, ITL and total latency.
- Change only the cross-NIC policy or rank-to-rail mapping, not several NCCL variables at once.
- Repeat under both low and production-like congestion. Keep the change only if it improves the target percentile without harming another important metric.
When a change helps only an isolated microbenchmark, treat it as a hypothesis rather than a production fix.
6. Treat NCCL tuning as a last-mile experiment
NCCL is tuned for a wide range of systems. NVIDIA’s performance guidance lists controls involving CTA counts, chunk size, queue pairs per connection and cross-NIC behavior, but cautions that these controls are workload- and topology-sensitive.
“In general we discourage the use of these variables in production since a tuning gain in one benchmark situation can lead to suboptimal settings elsewhere.” — NVIDIA NCCL performance and tuning documentation
Use one-variable experiments
- Choose one suspected bottleneck, such as insufficient parallelism for a large collective or too few queue pairs on RoCE.
- Change one setting and record the exact value, NCCL version, topology and workload.
- Measure collective time, TTFT, ITL, total latency and p99 under the same traffic pattern.
- Revert the change if it improves only a synthetic test or causes more tail stalls, CPU contention or memory pressure.
RoCE-specific caution
NVIDIA notes that multiple queue pairs may be needed for optimal RoCE performance. Do not increase them blindly: additional queue pairs can alter switch load, congestion behavior and CPU overhead. Confirm the result with NIC error, drop, pause and PFC counters while the test is running.
Distinguish an NCCL issue from a hardware issue
NVIDIA advises separating application or hardware-specific problems from an NCCL performance bug. Reproduce the behavior with the smallest representative NCCL test, compare it with independent RDMA and GPU-link measurements, and collect topology and initialization logs. A clean fabric plus a reproducible NCCL-only regression is evidence for further NCCL investigation; it is not evidence that a new switch or adapter will solve the serving problem.
7. Place serving pools and high-volume transfers deliberately
Inference architecture can create latency even when point-to-point links are healthy. NVIDIA’s Inference Reference Architecture calls out model size, GPU and NIC topology, prefill and decode roles, cache locality and failure domains as placement considerations.
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Review disaggregated prefill and decode
Separate prefill and decode pools only when the transfer and scheduling costs are acceptable for the workload. Map the path for activations or key-value cache data between pools, then measure that path under the same concurrency as production. A design that shortens prefill time can still increase TTFT or ITL if cache transfers cross a congested rack boundary.
Place routers and cache services near their traffic
Review the location of request routers, cache services and model-weight transfer services. The highest-volume flows should use an appropriate fabric and avoid competing with latency-sensitive control traffic where the network design permits traffic separation. Keep failure domains visible: concentrating all cache or prefill capacity behind one rack uplink can turn a single link issue into a fleet-wide tail event.
Evaluate optional transport features conditionally
RDMA, GPUDirect RDMA, dual-plane networking and DPU offload can be useful capabilities, but none is an automatic latency improvement. Validate software support, GPU/NIC topology, switch configuration, isolation and observability in the deployed serving stack. Compare end-to-end request and token metrics, not only a transport microbenchmark.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.GB200 NVL5: a platform-specific path example
Do not generalize the following numbers or topology to unrelated GPU systems. NVIDIA’s GB200 NVL Multi-Node Tuning Guide describes multiple communication paths between endpoints in the specific NVL5 setting.
Choose the path by message size
The guide describes multi-node NVLink as providing the highest bandwidth and lowest latency for large messages in that platform, with a stated 900 GB/s unidirectional theoretical maximum. That is a hardware bandwidth ceiling, not an end-to-end inference-latency result. The same guide states that for a very small message such as 1 byte, InfiniBand over CX-7 has lower latency. Therefore, benchmark the message sizes generated by your collectives instead of selecting a path from its peak bandwidth number.
Account for the secondary east-west network
In the described design, a secondary east-west CX-7 InfiniBand network is used primarily for inter-rack connectivity. Check that the inter-rack route, adapter, switch ports and software stack are healthy before attributing a cross-rack stall to NVLink. A compatible ConnectX-7/CX-7 adapter is a component to evaluate only when the existing platform supports it; the adapter alone is not a latency fix, and exact model, optics, cabling and server compatibility must be verified for the deployment.
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Use a comparison record that exposes trade-offs
When comparing any proposed change, record the following axes in one test sheet. They prevent an apparently faster result from being applied outside the conditions that produced it.
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| Axis | Values to record |
|---|---|
| Service outcome | TTFT, ITL, total response time, p50/p95/p99 and timeout rate |
| Workload | Model, prompt and output lengths, batch size, concurrency and traffic mix |
| Communication | Collective type, message size, number of ranks, point-to-point pattern and bandwidth/latency result |
| Placement | GPU, CPU, NUMA node, NIC, rail, rack and inter-rack path |
| Fabric health | Link width and speed, retries, errors, drops, pause frames, PFC events and switch queue behavior |
| Software | GPU driver, CUDA, NCCL, RDMA stack, serving framework and changed environment variables |
| Operational fit | Failure-domain impact, observability, rollback method and compatibility with the serving stack |
Failure patterns and recovery actions
“Bandwidth is healthy, but p99 is high”
Run repeated point-to-point latency tests while reproducing the workload. Trend retries, RDMA errors, NIC drops, pause frames and PFC events. Compare the affected rack path with a healthy path at the same message size. If the counters rise only under load, investigate congestion and queueing rather than replacing the application-level collective first.
“Only cross-rack requests are slow”
Verify the secondary uplink, switch route, optics, adapter port and rail mapping. Confirm that the serving router is not sending prefill, decode or cache traffic through an unintended rack. Test the exact rack pair independently before changing NCCL settings.
“NCCL is slow, but RDMA and GPU tests pass”
Inspect rank-to-GPU and rank-to-NIC mapping, NUMA affinity, selected rings or trees and cross-NIC behavior. Reproduce with a minimal NCCL test and compare logs. Change one NCCL parameter at a time only after the topology is understood.
“A tuning change helped one benchmark and hurt production”
Revert it, then rerun with production message sizes, concurrency and competing traffic. Include p95 and p99 token timing. NCCL’s own guidance warns that a setting that wins one benchmark can be suboptimal elsewhere.
“A single node or port dominates the tail”
Drain the suspected node or route a controlled subset of traffic away from it. Recheck link state, width, speed and counters, then compare with a known-good node using the same rank placement. This isolates a component-specific fault without changing the entire cluster.
A repeatable runbook
- Define whether the incident is TTFT, ITL, total latency, collective latency, point-to-point latency or tail behavior.
- Capture p50/p95/p99 by model, request size, concurrency, rack pair and serving role.
- Check InfiniBand or RoCE link state, layer, speed and width on both endpoints.
- Run
ib_write_bwandib_write_latwith production-relevant message sizes and traffic conditions. - Inspect
rdma statistic,mlxlink,perfquery/ibdiagnetfor InfiniBand, orethtool -Sfor RoCE. - Run
nvidia-smi topo -m,nvidia-smi topo -p2p nand the supported multinodenvbandwidth/nvloomchecks. - Align ranks with nearby CPU cores, NUMA memory, GPU and NIC; verify the mapping in NCCL logs.
- Test rail and
NCCL_CROSS_NICbehavior against the physical topology. - Change one NCCL tuning factor at a time, with rollback ready.
- Review prefill/decode, router, cache and model-weight-transfer placement, then validate the complete serving workload under load.
This order keeps a measurable hardware or placement fault from being hidden by a speculative software knob. It also makes the final change defensible: you can show which metric improved, under which path and workload, and what trade-off was accepted.
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