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The reliable way to compare AI accelerators is to run the same workload with the same model, precision, software, latency target, and system scale, then report delivered throughput or latency beside memory, power, networking, availability, and total cost. Peak FLOPs, a memory-size figure, a board-power rating, and a vendor price example describe different properties; none is a universal performance or value ranking.
Start by defining the comparison you actually need
An accelerator that is excellent for large-batch training may be a poor choice for low-latency serving. Before collecting specifications, write down the decision in one sentence: for example, “minimize cost per million generated tokens for a 120-billion-parameter model at 50 tokens per second” or “finish a 175-billion-parameter training run in the fewest hours.” That sentence determines which measurements matter.
- Training or inference: Training emphasizes sustained throughput, scaling efficiency, memory capacity and interconnect traffic. Inference adds latency targets, concurrency, context length and decoding efficiency.
- Model and version: Record the exact model checkpoint, parameter count, quantization, tokenizer and serving or training framework.
- Shape of the work: Note batch size, sequence length, image resolution, audio duration or other input dimensions. Changing these can change the bottleneck.
- Quality target: A lower-precision or quantized run is not comparable if it changes output quality, accuracy or convergence.
- Scale: State the number of accelerators, host configuration and whether the result is single-chip, single-node or a larger pod.
Without those details, “faster” usually means only that one number was measured under a different workload.
Use three separate performance categories
| Category | What it tells you | How to report it |
|---|---|---|
| Advertised peak | Theoretical arithmetic throughput under a stated precision and assumptions such as structured sparsity. | Include precision, dense or sparse mode, units and whether the figure is per chip. |
| Benchmark performance | A measured result for a named model, dataset, software stack, system and benchmark round. | Identify the benchmark version or round, chip count, result type and date. |
| Production performance | Throughput, latency, reliability and utilization delivered by your deployed workload. | Measure the complete system, including hosts, networking, storage and orchestration. |
Peak throughput is useful for understanding a design, but it does not predict utilization. A memory-bound kernel, communication-heavy distributed job or software path that lacks an optimized operator can achieve a small fraction of the advertised ceiling.
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Build an apples-to-apples benchmark
Use this procedure whenever you compare chips, cloud instances or on-premises systems.
- Freeze the workload. Select a representative model and dataset. For inference, set prompt length, output length, concurrency and a latency percentile such as p95. For training, set global batch size, sequence length, optimizer and target quality.
- Freeze numerical settings. Record BF16, FP16, FP8, INT8 or another format, plus accumulation precision, quantization method and any sparsity pattern. Do not compare a sparse number with a dense number without labeling it.
- Freeze software. Capture operating-system image, driver, compiler, framework, kernel libraries, serving engine and model-specific flags. Pin versions so a later run is reproducible.
- Match system scale. Compare one chip with one chip, an eight-accelerator node with an eight-accelerator node, or a pod with a pod. Document host CPUs, system memory, local storage, network fabric and topology.
- Warm up and repeat. Exclude startup and compilation from steady-state numbers unless startup time is part of the user experience. Run enough iterations to report a median and a tail-latency percentile, and record variance.
- Measure useful work. Capture samples per second, tokens per second, time to train to a target loss, or completed jobs per hour. Also capture errors, retries and utilization.
- Measure energy at a stated boundary. Log accelerator, server and, when possible, facility-side energy separately. Align the power trace with the useful-work interval.
- Record commercial assumptions. Save provider, region, machine shape, billing unit, discounts, minimum commitments, storage, egress and utilization. A rate without those fields cannot produce a defensible total cost.
Publish the raw configuration with every result. A table that lists only “tokens per second” hides the choices that generated it.
Memory: capacity and bandwidth answer different questions
Capacity determines whether model weights, activations, optimizer states and runtime buffers fit without offloading or aggressive sharding. Bandwidth determines how quickly data can move between compute units and high-bandwidth memory once it is resident. More capacity does not automatically mean higher throughput, and high bandwidth cannot help a model that does not fit.
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|---|---|---|---|---|
| AMD Instinct MI300X | 192 GB HBM3 | 5.3 TB/s | Server form factor; AMD identifies a December 6, 2023 launch date. | AMD specifications |
| NVIDIA H100 SXM | 80 GB HBM3 | 3.35 TB/s | HGX reference system provides 640 GB across eight GPUs. | NVIDIA HGX technical reference |
| NVIDIA H200 SXM | 141 GB HBM3e | 4.8 TB/s | HGX reference system provides 1.1 TB across eight GPUs. | NVIDIA HGX technical reference |
| NVIDIA B200 SXM | 180 GB HBM3e | Up to 8 TB/s | HGX reference system provides 1.44 TB across eight GPUs. | NVIDIA HGX technical reference |
| Google Cloud TPU v5p | 95 GiB HBM | 2,765 GB/s | 1,200 GB/s bidirectional inter-chip bandwidth; pod described as 8,960 chips. | Google Cloud TPU v5p documentation |
Keep GB and GiB exactly as published: they are different units. Also keep per-chip and aggregate totals in separate columns. An eight-chip total cannot be compared with a single-chip capacity when deciding whether a model fits.
Estimate whether a model fits
Start with weight storage: parameter count multiplied by bytes per parameter. Add gradients, optimizer states, activations, communication buffers and framework overhead. Training commonly needs several times the weight memory; the multiplier depends on optimizer and checkpointing, so measure it with the intended software. If the footprint exceeds one device, test tensor or pipeline parallelism and include the communication cost rather than assuming linear scaling.
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Diagnose a bandwidth bottleneck
When arithmetic units are underutilized while HBM traffic is near its limit, try larger fused kernels, better data layout, caching or a workload with higher arithmetic intensity. If the model repeatedly moves data between chips, inspect interconnect counters and scaling efficiency; local HBM bandwidth alone will not explain the result.
Compute specifications require precision context
| Product | Published peak example | Qualification |
|---|---|---|
| AMD Instinct MI300X | 2.61 PFLOPs FP8; 5.22 PFLOPs FP8 with structured sparsity | AMD-published specifications; sparse and dense figures are not interchangeable. |
| Google Cloud TPU v5p | 459 TFLOPs per chip for BF16 and 459 TFLOPs per chip for FP8 | Google documentation; the equal numeric values use different precision modes. |
Never rank these figures without aligning precision, sparsity, operation type and whether the vendor counts fused operations. A BF16 number and an FP8 number can imply different model quality and memory behavior. Peak FLOPs also omit utilization and communication, so use measured application throughput for a buying decision.
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Power use: separate a rating from energy per task
A board or module power rating is a design limit or typical value, not a measurement of the energy needed to finish your job. AMD lists 750 W peak typical board power for MI300X. NVIDIA states that each B200 GPU is configurable up to 1 kW in its HGX documentation. Those figures use different product contexts and do not establish which device is more efficient.
Measure the same system boundary
- Chip or board: Useful for thermal design, but excludes host and conversion losses.
- Server: Includes CPUs, memory, fans, power supplies and local storage; this is usually the minimum fair boundary for a deployed service.
- Facility: Adds networking, storage, cooling and power-usage effectiveness. Use it for capacity planning and operating cost.
Log average power over the steady-state interval and pair it with completed work. Energy is average watts multiplied by runtime, divided by 1,000 to obtain kilowatt-hours. For a service, report tokens per joule or joules per million tokens; for training, report kilowatt-hours per completed run at the target quality. Include idle, warm-up and failed-run energy when they materially affect utilization.
Why a lower wattage rating may not reduce cost
A slower accelerator can consume fewer watts per hour yet require more hours and more machines. Conversely, a high-power device can finish the same job quickly and use less total energy. Only a synchronized energy-and-work measurement answers the efficiency question. No common independent measurement establishes a universal efficiency winner among the products listed here.
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Cost: choose a denominator before collecting prices
Separate three financial questions:
- Acquisition cost: Purchase price, support, networking, racks, power delivery and cooling amortized over useful life.
- Rental cost: Dated hourly or per-minute rate for a named machine shape, region and billing commitment.
- Unit economics: Cost per training run, image, request or million tokens at a stated latency and quality.
For an hourly deployment, a simple estimate is: workload cost = hourly system rate × runtime hours. Add storage, data transfer, orchestration, licenses, engineering time and retry overhead. For owned hardware, divide capital and facility costs by expected productive hours, not by 8,760 calendar hours; utilization is usually the decisive assumption.
Historical TPU price examples
| TPU generation | Published price | Context |
|---|---|---|
| TPU v4 | $3.22 per chip-hour | Google Cloud list-price comparison published in December 2023; normalized per chip for GPT-3 175B at sequence length 2,048. Historical, not a current rate. |
| TPU v5e | $1.20 per chip-hour | Same Google Cloud December 2023 comparison and normalization; historical. |
| TPU v5p | $4.20 per chip-hour | Same Google Cloud December 2023 comparison and normalization; historical. |
See the original context in Google Cloud’s TPU v5p announcement. Do not substitute these figures for a current regional quote.
Token-cost examples need identical test conditions
NVIDIA’s H100 page cites SemiAnalysis InferenceX for an April 2026 GPT-OSS-120B example: about $0.09 per million tokens for H100 at 66 tokens per second per user using vLLM, and about $0.02 per million tokens for B200 at 55 tokens per second per user using TensorRT-LLM. The software stacks and throughput differ, so the figures are not a controlled head-to-head test or an acquisition price. Treat them as scenario-specific, vendor-hosted evidence and reproduce the workload before making a procurement decision. The cited page is NVIDIA’s H100 resource.
No same-date, same-region purchase-price comparison across AMD, NVIDIA and Google is established here. Request dated quotes or use current regional cloud price sheets, then apply your measured runtime and utilization.
System scale and interconnect can dominate results
Distributed training and large-model inference spend substantial time exchanging activations, gradients, weights and control messages. Record intra-node links, scale-out network bandwidth and topology, then measure scaling efficiency:
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scaling efficiency = single-device throughput × device count ÷ measured multi-device throughput
A result below ideal scaling is not automatically a hardware failure; it may reflect synchronization, uneven batches, data loading or software collectives. Compare equivalent node sizes. NVIDIA’s HGX values describe an eight-GPU reference system, while Google’s TPU v5p documentation describes pod-scale topology, including up to 8,960 chips and a largest single scheduled job of 6,144 chips (96 cubes). A chip-to-pod comparison silently changes the unit of analysis.
Use benchmark evidence carefully
MLPerf results are tied to named rounds, submissions, systems and workloads. Use the benchmark record that matches your task, and preserve the model, scale, software and result type. NVIDIA’s MLPerf page reports Training v6 submissions including GB200 NVL72 and GB300 NVL72 systems and summarizes up to 1.6× faster training for GB300 versus GB200 at the same scale. That is a vendor summary of named submissions, not a universal ranking of every accelerator.
The page identifies retrieval dates of June 16, 2026 for certain training rounds and September 16, 2026 for Inference v6.1. When citing it, include the round and submission rather than writing “MLPerf says this chip is fastest.” Consult the MLPerf benchmark resource and inspect the underlying result details.
Create a comparison worksheet
A spreadsheet or database prevents hidden assumptions. Use one row per product-and-system configuration, not one row per chip family. Recommended columns are:
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- Model, workload type, dataset, batch, sequence length and quality target.
- Precision, sparsity, quantization and software versions.
- Accelerator count, host CPU and RAM, local storage, interconnect and network.
- Advertised peak compute, measured throughput, latency percentiles and utilization.
- Memory capacity and bandwidth, clearly labeled per chip or aggregate.
- Average and peak power at board, server and facility boundaries.
- Runtime, energy per completed job or million tokens, failures and retries.
- Provider, region, date, hourly rate or purchase quote, and utilization assumption.
Derive cost per useful unit from measured values. For example, if a server costs a stated hourly rate and produces a measured number of million tokens per hour, divide the rate by that output. If quality, latency or availability differs, keep separate rows rather than averaging them into a misleading score.
Choose based on the bottleneck
When the model does not fit
Prioritize per-chip memory, then evaluate sharding overhead and available node sizes. A device with more HBM can avoid offload and reduce communication, even if its peak FLOPs are lower.
When memory traffic limits throughput
Prioritize measured bandwidth and kernel efficiency. Verify that the software stack reaches the hardware’s intended data paths; a specification alone does not guarantee application bandwidth.
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Measure single-request and concurrent latency, including p50 and p95 or p99, with the exact context and output lengths. A high-throughput batch benchmark cannot answer a low-concurrency latency question.
When operating cost is the constraint
Use energy per useful unit and fully loaded cost per useful unit. Include utilization, cooling, host resources, network, storage and engineering. A lower hourly price can lose if it requires more devices or longer runtime.
When deployment risk matters
Check framework and compiler support for every required operator, model license, cloud availability by region, supply lead time, maintenance plan and rollback path. Hardware that cannot run the target model reliably has zero effective throughput.
Common comparison mistakes and fixes
- Ranking by FLOPs alone: Replace it with measured throughput for the target workload and precision.
- Calling memory capacity bandwidth: Keep separate columns and units; capacity answers “will it fit?” while bandwidth answers “how fast can data move?”
- Comparing board watts with server watts: Use the same boundary and report measured energy per task.
- Mixing chip and system totals: Label per-chip, node and pod values explicitly.
- Using a vendor token-cost example as a universal price: Preserve model, software, date, throughput and provider; reproduce it under your conditions.
- Ignoring software: Pin versions and record kernels, compilers and serving engines; otherwise a software change can look like a hardware gain.
- Hiding availability and utilization: Add region, capacity, queue time and expected productive hours to the cost model.
- Forcing a single winner: Publish a workload-specific decision. Different constraints legitimately produce different choices.
A defensible final report
Present the decision in this order: workload definition, tested configurations, measured performance, memory fit, energy per useful unit, fully loaded cost, availability and risks. Put advertised specifications in a separate table from measured results. State every date and source, and preserve qualifiers such as “up to,” “peak,” “historical,” “per chip” and “reference system.” The result should let another engineer reproduce the comparison and understand which assumption would change the recommendation.
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The practical conclusion is not that one accelerator wins every category. The right choice is the system that meets the model’s memory and latency requirements, delivers the required throughput with acceptable scaling, and minimizes measured cost and energy under the deployment conditions you can actually obtain.
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