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Short answer: you cannot decide from a model’s file size alone. Check the exact device, the exact inference task, runtime and operator support, free flash and peak working RAM, then measure latency, power and accuracy on representative inputs. A model that fits in storage can still fail when tensor buffers, sensor data, firmware and communication tasks compete for memory.
Define what “run AI” means for your device
Capability is workload-specific. “Can my device run AI?” has no useful yes-or-no answer until you specify the model, input and operating limits. A keyword-spotting model processing a short microphone window is a very different workload from image classification, object detection or vibration analysis at a high sampling rate.
Write down the inference contract
Before comparing hardware, record:
- Input: sensor type, sample rate, image or audio dimensions, color format, and preprocessing steps.
- Output: classes, scores, anomaly value, regression result or control action.
- Frequency: one inference at boot, once per minute, continuously, or on every sensor window.
- Quality target: acceptable false positives, false negatives and other task-specific errors.
- Latency: the maximum time from an available input to a usable result.
- Power: battery life, peak current, thermal limit and whether a mains supply is available.
- Connectivity: whether inference must remain local and offline or can call a gateway or cloud service.
- Update model: how firmware and model files will be replaced in the field.
These requirements determine whether a tiny microcontroller (MCU), an embedded Linux computer or a device with a dedicated accelerator is appropriate. There is no universal RAM threshold for “small AI.”
Inventory the exact hardware and software
Use the board and chip actually deployed, including its hardware revision. Product-family specifications are not enough because available memory, instruction-set extensions and peripherals can differ between revisions.
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Processor and acceleration
Record the CPU architecture (for example, an Arm Cortex-M microcontroller or a 64-bit Linux processor), clock frequency, number of cores, floating-point or SIMD extensions, and any DSP, neural-processing unit or GPU. Note whether the acceleration is accessible from your chosen runtime; a block present on the silicon does not guarantee that your model can use it.
Memory that is really free
Measure free flash and free RAM after the normal application, bootloader, communication stack, operating system and drivers are loaded. Record peak usage, not just the idle value. Keep room for:
- Model weights and runtime code in flash or other nonvolatile storage.
- Input, output and intermediate tensors in RAM.
- Sensor DMA buffers, image or audio frames and preprocessing workspaces.
- Operating-system services, networking, logging, update mechanisms and other application tasks.
- Temporary allocations made by the runtime during graph preparation and invocation.
Capture the compiler, SDK, operating-system or firmware version and build options. Changing optimization flags, libraries or logging can change the final footprint.
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Confirm that the target can acquire the required data without an unsupported driver or excessive copying. An image model may need a camera interface and a contiguous frame buffer; an audio model may need a DMA ring buffer and a particular sample format. The memory needed to hold and transform the input belongs in the feasibility calculation.
Check runtime, architecture and operator compatibility
A model can be numerically valid yet impossible to deploy because the inference runtime does not support the target CPU, file format or one of the graph operators.
LiteRT for Microcontrollers constraints
Google’s LiteRT for Microcontrollers overview describes a runtime designed for devices with only a few kilobytes of memory. Its core runtime fits in 16 KB on an Arm Cortex-M3 and can run many basic models. That figure describes the runtime core, not the total RAM or flash required by your model, tensors, application and firmware.
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The microcontroller workflow is deliberately constrained: create a model using supported operations, convert it to LiteRT, convert the model to a C byte array stored in read-only program memory, and invoke it through the C++ library. The runtime uses C++17 and requires a 32-bit platform. Google reports testing on Arm Cortex-M processors and ports to other architectures, including ESP32.
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Expect manual, low-level memory management, restricted operator and device coverage, and no on-device training. The documentation states: “On device training is not supported.” For a more capable embedded Linux device such as Raspberry Pi, Google says the standard LiteRT framework may be easier to integrate.
Operator support is a deployment gate
Inspect the converted graph and compare every operation with the runtime’s supported set. Unsupported operators may prevent conversion, force a fallback implementation, or require a custom kernel that increases code size and maintenance. Check data types, tensor shapes, delegates and required quantization formats as well as the CPU architecture.
Do this compatibility check before optimizing a model or designing a hardware enclosure. A theoretically smaller model is not useful if its operations cannot execute on the selected target.
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Edge Impulse hardware and deployment documentation describes estimating memory, flash and latency in its Studio and Python SDK, then deploying C++ to MCU targets when the build system and resources support it. Treat those estimates as a workflow, not as proof that a custom device is compatible. Build and run the generated application on the exact target.
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On Linux gateways, an architecture can load LiteRT or ONNX model assets on the edge device and update those assets separately from the complete module image, as described in Microsoft’s IoT Edge machine-learning inference architecture. Separate model updates can reduce operational risk, but you still need version checks, rollback handling and enough local storage.
Separate model storage from inference working memory
The model file is only one memory requirement. Storage is a persistent capacity constraint; working memory is a peak, temporary constraint during preprocessing and inference.
| Resource | What consumes it | How to check |
|---|---|---|
| Nonvolatile storage (flash or filesystem) | Model weights, runtime code, firmware, bootloader, metadata and update slots | Measure free space in the production image and reserve room for safe updates |
| Peak RAM | Input and output tensors, intermediate activations, tensor arena, sensor buffers, stacks and other tasks | Record high-water marks while the complete application runs the model |
| Compute time | Preprocessing, operator execution, postprocessing, scheduling and I/O | Time repeated inferences on the target under realistic system load |
| Energy and thermal headroom | CPU or accelerator activity, memory transfers, sensors and radios | Measure current, battery impact and temperature during the intended duty cycle |
For example, a compressed or quantized model may occupy little flash while its intermediate feature maps require more RAM than the application has available. Conversely, a model can fit in RAM but exceed the latency or battery budget. Only a complete workload measurement reveals the limiting resource.
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Account for update strategy
If the device keeps two firmware or model images for atomic updates, the update process may temporarily require close to twice the model storage, plus metadata. A filesystem-based Linux gateway may also need space for container layers, logs and message buffering. Calculate the deployment and rollback layout, not merely the steady-state file size.
Estimate feasibility before writing production code
- Choose a plausible model. Select an architecture that matches the input and accuracy target. Record its file format, data types, input shape and expected operation set.
- Convert for the target runtime. Run the converter and inspect warnings, unsupported operations and required delegates or kernels.
- Build a minimal target application. Include the runtime, model and representative input path rather than benchmarking the model on a desktop.
- Measure flash. Inspect the linked binary and production image, including bootloader, filesystem and update reserve.
- Measure peak RAM. Capture the high-water mark during initialization, preprocessing and repeated inference. Include concurrent networking and sensor tasks.
- Measure latency. Report preprocessing, inference and postprocessing separately, then report end-to-end response time under realistic interrupts and background work.
- Test representative and worst-case inputs. Different image sizes, audio conditions or sensor patterns can alter preprocessing time and memory behavior.
- Evaluate quality and power. Run a held-out validation set on the optimized model and measure current and temperature under the intended duty cycle.
Vendor calculators and desktop estimates are useful for screening candidates. They are not substitutes for a build and test on the production device.
Optimize only after establishing a baseline
Record baseline accuracy, flash, peak RAM, latency and energy before changing the model. Then change one factor at a time and repeat the same tests.
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Quantization
Quantization reduces numerical precision from the default 32-bit floating-point representation. It can reduce model size and computation, and may lower latency, especially when the target has efficient integer kernels. The exact accuracy and speed effect depends on the model, calibration data and hardware. Some accelerators require a particular quantization scheme or model format, so verify those requirements before conversion.
Pruning and clustering
TensorFlow’s model-optimization guidance covers quantization, pruning and clustering. Pruning removes or limits less-useful weights; clustering constrains weights to shared values. These techniques can reduce footprint or improve execution on compatible implementations, but they do not guarantee a smaller binary or faster inference on every target.
Reduce the complete pipeline
- Lower input resolution or sampling rate only if the task still meets its error target.
- Use streaming or windowed preprocessing instead of retaining unnecessary history.
- Reuse buffers where the runtime permits and remove debug logging from production measurements.
- Choose an operator-supported architecture rather than adding custom kernels to a tiny target unless the maintenance cost is justified.
After each change, recheck conversion, accuracy, peak RAM, flash, latency and power. Never assume that a smaller model file means a smaller tensor arena.
Choose the device class from measured workload evidence
| Device class | Usually suitable for | Primary checks | Typical reasons to move up |
|---|---|---|---|
| Microcontroller | Simple sensor, keyword or low-rate classification with a small supported graph | Very tight RAM and flash, operator subset, fixed-point support, interrupt interaction and battery current | Large inputs, complex operators, demanding latency or insufficient accuracy at the available model size |
| Embedded Linux computer | Richer preprocessing, larger models, multiple services and easier runtime integration | Free RAM and storage after the OS, container or package overhead, thermal behavior and update process | Need for lower latency, higher throughput, camera pipelines or multiple concurrent models |
| Linux device with accelerator | High-throughput or neural-network workloads that match the accelerator’s compiler and formats | Delegate/operator coverage, quantization rules, memory bandwidth, driver maturity and power | Model is unsupported, accelerator overhead dominates, or software maintenance outweighs the gain |
For perspective, Microsoft’s IoT Edge supported-platform guidance gives workload-scoped configuration examples: edgeAgent only at 256 MB RAM, 2 GB storage and one CPU core; a typical edgeAgent, edgeHub and a few modules configuration at 1 GB RAM, 8 GB storage and two cores; and production with many modules and message buffering at 2+ GB RAM, 16+ GB storage and four or more cores. These are platform configuration examples, not generic minimums for AI. Microsoft explicitly warns that image-processing and machine-learning modules need significantly more resources than telemetry filtering.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Diagnose common failure modes
“The model fits in flash, but allocation fails”
Inspect the peak tensor arena and input buffers. Reduce activation memory through a smaller input, a different architecture or supported buffer reuse. Check stack sizes and simultaneous communication tasks. Do not solve a RAM failure by looking only at the model file.
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Replace the operation with a supported equivalent, select a model architecture designed for the runtime, or move to a runtime and device class with broader operator coverage. A custom implementation is possible on some platforms, but it adds code size, testing and long-term maintenance.
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“Inference works but misses the latency target”
Time preprocessing and postprocessing separately from the model. Confirm that the expected accelerator delegate is actually active. Then test a lower-resolution or quantized model and repeat end-to-end measurements with radio and sensor activity enabled.
“Accuracy drops after quantization”
Validate calibration data, input scaling and representative operating conditions. Try a different quantization method or selectively retain higher precision where supported. If the task target cannot be met, use a larger model or a more capable device rather than hiding the error with a looser threshold.
“The prototype works, but the product reboots”
Check peak current, brownout margins, thermal throttling, watchdog timeouts and fragmentation from repeated allocations. Reproduce the failure with production firmware, logging enabled for diagnosis and the same duty cycle as field operation.
“A Linux module runs out of space or memory”
Include container layers, logs, package caches, message buffers and update copies in the capacity plan. Remove unused modules, limit retention and allocate more storage or RAM when the measured workload requires it. Do not apply an IoT Edge tier as a universal AI minimum.
Use a repeatable acceptance checklist
- Exact board, chip, hardware revision and production firmware are identified.
- CPU architecture, acceleration, compiler and runtime versions are recorded.
- Input shape, sampling conditions, output, error tolerance and latency limit are documented.
- Every model operator and data type is supported by the selected runtime or delegate.
- Free flash includes firmware, model, filesystem and update or rollback reserve.
- Peak RAM includes tensors, preprocessing, sensor buffers, stacks and concurrent services.
- Representative and worst-case inputs have been tested on the target.
- Accuracy after quantization, pruning or clustering meets the application requirement.
- End-to-end latency, energy and thermal behavior meet the operating budget.
- Model and firmware update, rollback and version compatibility have been tested offline if required.
When to move inference off the device
If no supported model meets accuracy, latency and power limits after reasonable optimization, move inference to an embedded Linux gateway or another local system rather than forcing it onto the MCU. Keep the sensor device responsible for acquisition and safe fallback behavior, and specify what happens when connectivity is absent. A cloud-only design may reduce device requirements but changes privacy, availability, bandwidth and response-time assumptions; it is not equivalent to local offline inference.
The correct decision is the smallest platform that passes the complete workload test with operational margin. Start with the actual task, verify software support, measure storage and peak working memory, and then choose or optimize the hardware based on evidence from the target device.
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