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You can use an RP2350 to capture a digital video signal by having its PIO state machines sample GPIOs at controlled times and DMA move the resulting words into memory. Software then has to interpret those samples using the source’s actual sync timing, data width, polarities, and pixel encoding. There is no universal “TTL video” pinout or decoder: identify the signal and confirm its electrical levels before connecting it.
A Raspberry Pi Pico 2 is a practical starting board because it uses the RP2350 and has twelve PIO state machines and 520 kB of SRAM. Those resources make high-speed capture possible, but they do not make the board a plug-and-play video input. The concrete capture schedule, wiring, buffer size, and decoder all depend on the signal you need to read.
What “TTL video” does—and does not—tell you
“TTL video” is not enough information to define a capture. It suggests a digital signal, but it does not identify the connector or pinout, the voltage range, the timing, the number of data lines, or how pixel values are encoded. Two sources described with the same shorthand may therefore need different wiring and different capture logic.
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Before choosing GPIO pins or writing PIO code, obtain the source’s interface documentation or measure it with suitable equipment. Establish the following details:
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- Electrical levels: the high and low voltages, signal reference, and any interface requirements. Do not connect an unknown signal directly to an RP2350 GPIO. Check the source and board specifications and decide whether conditioning or protection is needed before wiring.
- Data format: how many data lines carry each sample, and what a value on those lines represents. The bit width alone does not identify the pixel encoding.
- Timing reference: whether the source supplies a pixel clock, or whether data must be sampled in relation to sync or another timing signal.
- Sync signals: which signals mark line or frame boundaries, their active polarities, and their timing relative to data.
- Capture goal: whether you need a short diagnostic capture, a bounded image region, a complete frame, or ongoing processing. The amount of data to retain affects the buffer and capture strategy.
Do not infer these details from a connector shape or the word “TTL.” If the source documentation does not specify them, pause before building the GPIO connection: a capture program cannot correct an unsafe or incorrectly identified electrical interface.
How the RP2350 capture path works
The general architecture is to sample the relevant GPIO signals with PIO, transfer sample words to memory with DMA, and parse the captured data in software. PIO provides programmable, deterministic I/O state machines; the Pico SDK’s official API documentation describes three PIO blocks on the RP2350 and integration with DMA for moving data. The RP2350 datasheet also describes a PIO-plus-DMA logic-analyser example that samples every GPIO on every cycle.
- PIO observes the inputs. A PIO program samples GPIOs at a controlled cadence or uses timing edges as part of the acquisition. The right method depends on whether the source provides a clock and how its sync signals relate to data.
- DMA moves samples. DMA transfers the captured words to memory so the CPU does not have to handle every sample individually. Buffer arrangement and transfer boundaries are implementation choices; they need to match the PIO program and how software will parse the data.
- Software finds meaningful boundaries. Decoder logic identifies the relevant sync events, associates samples with lines or frames, and interprets the data bits according to the source’s documented encoding.
- The application consumes the result. Once decoded, data can be inspected, transformed, or passed to another part of the project. What that output should look like depends on the application; the RP2350 capture mechanism does not dictate a display or file format.
This is an architecture assembled from the official PIO/DMA documentation and the logic-analyser example, not an official decoder recipe for a particular video interface. Those sources do not define a TTL video standard or provide a signal-specific PIO program. Treat the implementation as something to design for the identified source, not code that can be copied unchanged for every device.
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Choose the capture approach from the source timing
The most important timing question is whether the source supplies a pixel clock. A clock gives the capture logic a timing reference, but the PIO program still needs to sample data and relevant control signals in the correct relationship to it. If no pixel clock is supplied, the design must establish how sync or other available signals mark valid data and when a sample should be taken. Do not assume sync alone gives enough information to reconstruct pixels; confirm the source’s timing specification.
| Source timing arrangement | What the capture design must resolve | What is not established without the source specification |
|---|---|---|
| Pixel clock supplied | How PIO observes the clock and data, which edge or timing point represents valid data, and how line or frame sync is captured alongside it. | Clock frequency, edge relationship, data setup and hold requirements, and the correct PIO sampling schedule. |
| No pixel clock; timing conveyed by sync or other signals | How the available timing signals identify valid samples and boundaries, and how software relates those events to the data stream. | Sample cadence, active intervals, sync polarity, and whether timing information is sufficient for the intended decode. |
The table is a design checklist, not a comparison of named video standards. No particular standard or signal timing is specified here, so there is no supported universal sampling rate or code listing to give. Get the source timing first; then decide whether the PIO program should sample at a fixed cadence, respond to timing edges, or use a combination suited to that interface.
Plan for data volume before capturing
Fast sampling can fill memory quickly. Raspberry Pi’s RP2350 datasheet gives a PIO-plus-DMA logic-analyser example that can sample every GPIO on every cycle at a stated bandwidth of nearly 4 Gbps at 125 MHz, and explicitly warns that this fills RP2350 RAM somewhat quickly. This is the datasheet’s example, not a measured result for a TTL-video project or a guarantee that a particular video mode and firmware pipeline will sustain that rate.
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The Pico 2 documentation lists 520 kB SRAM. That finite memory makes the capture window an architectural decision: a high sample rate, many observed signals, or a long interval all increase the amount of data that must be retained or processed. Calculate the expected buffer needs from the chosen signal and capture format rather than assuming the entire frame will fit. The available sources do not establish a universal frame size, sample width, or buffer configuration for the unspecified interface.
Options to consider when the data volume is too large include:
- Capture only the required GPIOs. The datasheet’s example demonstrates capture of every GPIO, but a video project may not need every input. Reducing observed signals can reduce the data the application needs to retain, provided the selected pins still capture all information needed to decode.
- Bound the capture window. A short interval or a limited region can help answer a focused question, such as whether sync is being detected or whether data changes at the expected time. This is a design option, not a verified result for any particular source.
- Separate acquisition from interpretation. Let PIO and DMA collect the samples, then make the software decoder operate on bounded data. This makes it easier to distinguish a capture problem from a parsing problem, but the actual buffer and transfer design must be checked against the selected PIO program.
- Decide whether you need a snapshot or continuous operation. A bounded offline capture and an application that must process a continuing stream have different buffering demands. The required duration and processing behavior should be settled before fixing buffer sizes.
Do not treat the datasheet’s nearly 4 Gbps figure as a target you need to reach. The useful rate is the one that captures the identified signal reliably for the duration and amount of data your application needs.
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Build the RP2350 software starting point
The official Raspberry Pi examples repository documents two ways to select RP2350 for a project in typical cases: pass -DPICO_BOARD=pico2 when building for a Pico 2, or pass -DPICO_PLATFORM=rp2350 when selecting the platform directly. These are configuration choices, not a complete capture application. The examples repository is a hardware-software starting point; it does not, based on the cited material, supply a decoder for an unspecified TTL video signal.
- Choose the target. Use the board selection that matches the hardware, such as
-DPICO_BOARD=pico2for a Pico 2 build, or select-DPICO_PLATFORM=rp2350when your project’s configuration calls for the platform setting. - Confirm the example project builds for the target. Start from the official examples and the Pico SDK setup appropriate to your environment. A successful build confirms the project is configured for its target; it does not validate signal voltage, pin assignment, timing, or decoder correctness.
- Define the signal map. Record the GPIO assigned to each data and timing signal and the meaning of each active or inactive level from the source documentation. Check that the chosen interface is electrically suitable before attaching it.
- Write the PIO acquisition logic for that map. Specify which signals are sampled, how sampling is timed, and how the program’s samples will be transferred. Avoid copying a generic logic-analyser configuration as if it were a video decoder.
- Connect DMA and the receive buffer. Decide how sample words land in memory and how software knows which captured region to parse. Check buffer boundaries and transfer behavior against the PIO program before attempting a longer run.
- Implement signal-specific parsing. Use the documented sync behavior and data encoding to identify boundaries and interpret samples. Keep this layer separate from acquisition so you can tell whether incorrect output comes from sampling or from decoding.
The official API describes PIO blocks and DMA integration, while the datasheet’s logic-analyser example establishes that the combination can move high-rate samples. Neither fact supplies the GPIO wiring, PIO instructions, DMA configuration, or parser for a source whose interface has not been identified. Those details should come from the source’s timing and electrical specifications.
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Debugging is easier if you do not begin by trying to reconstruct a complete image. First verify that the system is observing the expected signals safely; then confirm that timing boundaries and data interpretation agree with the source documentation. A wrong-looking frame can result from an incorrect electrical connection, sampling schedule, sync interpretation, or pixel decode, and those causes should not be conflated.
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- Verify the interface before connection. Confirm signal levels and pin meanings from the source and RP2350 board specifications. If they do not establish a safe direct connection, determine the appropriate interface circuitry before proceeding.
- Capture a short interval. Keep the first capture bounded so it is easier to inspect and does not consume unnecessary memory. Include the timing and data signals needed to diagnose the chosen question.
- Check recognizable timing events. Compare captured edges or sample patterns with the documented sync behavior and clock relationship. If a boundary is missing or appears in the wrong place, revisit pin mapping, polarity, and PIO timing before changing the pixel decoder.
- Check data interpretation independently. Once boundaries are understood, verify that the software maps the observed data bits to the source’s documented values. Do not infer an encoding solely from an image that looks incorrect.
- Extend the capture only after the short test is understood. Increase duration or processing scope in steps, watching memory use and ensuring the design still serves its intended snapshot or continuous-processing goal.
These checks are a debugging method, not a claim that a particular signal has been tested on a Pico 2. The cited Raspberry Pi materials describe the platform and a logic-analyser example; they do not report a TTL-video capture test or establish expected output for a particular source.
What the RP2350 can and cannot establish for this project
The RP2350 provides programmable I/O and DMA-based data movement suitable for a high-speed capture architecture. Raspberry Pi’s documentation identifies three PIO blocks on the chip; Pico 2 documentation specifies twelve PIO state machines and 520 kB SRAM. Those platform facts help determine whether the board is a plausible controller for a capture design, but they do not resolve the source-specific work.
- Established by the platform documentation: PIO offers programmable, deterministic I/O state machines; the SDK describes DMA integration; the datasheet includes a PIO-plus-DMA logic-analyser example; and Pico 2 is an RP2350 board with the stated PIO and SRAM resources.
- Still dependent on your source: safe voltage compatibility, pinout, data width, sync signals and polarities, clock or sampling cadence, pixel encoding, capture duration, and whether the target is a snapshot or continuous processing.
- Not supplied as a universal recipe: a signal-specific wiring diagram, PIO program, DMA setup, or decoder for all devices called “TTL video.”
In practical terms, start with the source specification, then build the capture around it. The board’s capabilities make the architecture feasible to explore; they are not a substitute for identifying what the source actually sends.
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