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For most PCB layouts, start with a square grid. It matches the orthogonal geometry of common packages, board outlines, and fabrication rules. A regular hexagonal lattice offers three principal directions at 60-degree intervals instead of two perpendicular directions, so it can be useful to test when diagonal escape paths are central to the design. However, no controlled study in the available technical literature establishes that hexagonal routing produces shorter traces, fewer vias, less congestion, or faster autorouting.
The practical decision depends less on the drawing of the lattice than on how your EDA tool uses it, whether pads land on usable points, and whether every candidate route satisfies width, clearance, via, and manufacturing rules.
What the grid choice actually controls
A PCB “grid” can mean several different things, and confusing them leads to bad conclusions:
The Tool Desk
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- Router search grid: the discrete locations and moves an autorouter or interactive router examines internally.
- Final copper geometry: the actual coordinates and segment angles written to the board file and sent to manufacturing.
These layers are related but not identical. A board can be edited on a square snap grid while a topological router searches a less restricted space. Conversely, an editor may let you turn snapping off while routing without changing the router’s internal algorithm. Always identify which setting you are changing before comparing square and hexagonal approaches.
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Square lattice
A regular square lattice is defined by two perpendicular axes. In its simplest form, every point is reached by an integer number of horizontal and vertical steps. Many PCB workflows use this arrangement because component libraries, package dimensions, board edges, mounting holes, and measurement tools are commonly expressed in orthogonal coordinates.
Routers do not all use the same connectivity. A four-neighbor search permits horizontal and vertical moves; an implementation may also add diagonal or other moves. Therefore, “square grid” does not by itself tell you which track angles the tool can produce. It describes the underlying coordinate lattice, not a universal routing algorithm.
Regular hexagonal lattice
A regular hexagonal lattice has six edge-adjacent neighbors around each lattice point. Those neighbors lie along three undirected axes separated by 60 degrees: for example, 0, 60, and 120 degrees. This gives the lattice a third principal direction compared with the two axes of a basic square lattice.
That directional comparison is a geometric inference, not a measured PCB result. More represented directions can make certain diagonal connections look shorter or require fewer bends in an abstract path. They do not prove that a manufactured board will have shorter traces or better electrical performance. Pad geometry, keep-outs, layer changes, and design rules can remove the theoretical advantage.
Why a hexagonal lattice is not automatically more routable
A route is feasible only when a continuous path connects actual copper features while respecting every applicable rule. A lattice can offer a direction that appears attractive but still fail at the first pad escape, clearance check, or via transition.
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Pad locations and pitch
Component pads are fixed by the footprint. If a device has a fine-pitch rectangular array, its centers may align naturally with a square coordinate system. A hexagonal search grid may place candidate points between useful pad centers, forcing the router to add a jog, use a different resolution, or abandon the route. The opposite can occur with unusual angled layouts: a hexagonal lattice may provide a convenient sequence of 60-degree moves, but only if the pad exits and surrounding keep-outs leave room for them.
Placement-grid relationships matter even before routing starts. Autodesk’s autorouter guidance notes that an unsuitable relationship between placement and routing grids can prevent a connection between pins even when the visual space appears open. This is a tool-specific warning, but the underlying check is universal: verify that every required pad escape can be represented at the chosen resolution.
Track width and copper clearance
Changing the lattice does not relax electrical or manufacturing rules. A trace still needs its configured width, and adjacent copper still needs the specified clearance. At a diagonal angle, the effective footprint of a trace through a clearance corridor can differ from an orthogonal route. A path that fits visually on a coarse drawing grid may fail design-rule checking when the tool expands the trace by its width and clearance.
Vias and layer transitions
Via diameter and drill diameter consume space around a transition. A hexagonal path may approach a via at an angle that looks efficient but blocks neighboring escapes. Conversely, a square route may need an additional bend to reach a via while leaving a cleaner channel for adjacent signals. Compare actual via count and local congestion rather than counting lattice directions.
Board edges and orthogonal features
Most board outlines, mounting holes, connectors, shields, and mechanical cutouts contain horizontal and vertical edges. A diagonal route can cross these features sooner than an orthogonal route, reducing the usable corridor. Hexagonal routing is therefore most plausible where the surrounding geometry is also angled or where diagonal movement is genuinely available between obstacles.
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What current EDA documentation shows
Vendor documentation demonstrates why the square-versus-hexagonal question cannot be answered from geometry alone.
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Autodesk documents a minimum routing grid of 0.02 mm, approximately 0.8 mil, for the product covered by its guidance. That is a documented tool setting, not a universal PCB limit or a recommendation for every board. The same guidance says routing time increases exponentially as grid resolution becomes finer and recommends choosing the largest grid that still accounts for pads and design rules. It also emphasizes that pad positions and rules must be considered together.
The practical implication is straightforward: increasing resolution to make either lattice more precise can increase search cost sharply. A fair comparison must use resolutions that preserve the same physical clearance and pad-escape opportunities, not merely the same numeric step size.
Altium’s topological routing model
Altium describes its Situs topological autorouter as not constrained to an orthogonal grid. Track width and copper clearance still follow the applicable design rules, but the router’s search is not equivalent to tracing only horizontal and vertical cells. This means a square editor snap grid is not evidence that the finished copper is restricted to square-lattice paths.
KiCad 8.0 interactive routing
KiCad 8.0 documentation states that the interactive router observes configured track-width and copper-clearance rules and explains that grid snapping can be disabled during routing. Disabling snap changes cursor behavior; it does not establish that KiCad is using a hexagonal search lattice or that every arbitrary angle is acceptable. Record the exact KiCad version and routing mode when documenting an experiment.
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EasyEDA design-rule checking
EasyEDA documentation lists track width, clearance, via diameter, and drill diameter as design-rule constraints and describes real-time DRC during routing. DRC can identify violations of the rules configured in the project. It cannot confirm that those rules match a particular fabrication supplier’s capabilities, so the manufacturer’s own limits must be checked separately.
IPC grid guidance
IPC’s The Universal PCB Design Grid System describes a square via-grid example and argues that a common grid can reduce unnecessary bends. It is historical guidance about grid conventions, not a controlled comparison of hexagonal and square routing algorithms. Use it to understand why square grids became common, not as proof that they always produce the best modern routes.
Manufacturability guidance
EMA Design Automation’s 2024 routing guide recommends setting design rules to suit the intended board and fabrication process. That advice applies equally to both lattice types: trace dimensions, clearances, drills, and other limits are physical constraints, not optional properties of the coordinate system.
Direct comparison
| Question | Square lattice | Hexagonal lattice | What is established |
|---|---|---|---|
| Principal directions | Two perpendicular axes in the basic geometry | Three axes separated by 60 degrees | Geometric fact; not a PCB benchmark |
| Typical fit with package geometry | Usually natural for orthogonal footprints, connectors, and board edges | May require angled exits or a coordinate transformation | Depends on the actual footprint and placement |
| Potential path flexibility | Strong for horizontal and vertical corridors; additional moves depend on the router | Represents 60-degree directions in a regular lattice | Theoretical directional difference only |
| Trace length, bend count, via count | No universal value established | No universal value established | No direct controlled comparison was found |
| Search runtime and memory | Depends on resolution, connectivity, and implementation | Depends on resolution, connectivity, and implementation | Finer grids generally increase search cost; no hex-versus-square statistic is established |
| Design-rule compliance | Must satisfy width, clearance, via, and drill rules | Must satisfy the same rules | Tool and fabrication specific |
| Manufacturing yield | Not established by grid geometry alone | Not established by grid geometry alone | Requires board-specific fabrication evidence |
How to run a meaningful comparison
If you are evaluating a router or considering a nonstandard lattice, compare both methods on the same board rather than relying on a visual impression.
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- Record pad and pitch geometry. Measure the smallest pad pitch, pad-to-pad gaps, escape channels, and distances to nearby obstacles. Confirm that each candidate grid can represent the pad centers and required exits.
- Define what “grid” means in the tool. Document the cursor snap setting, router search setting, permitted angles, and whether the router is topological or cell-based. A snap-grid change alone is not a complete algorithm comparison.
- Choose physically equivalent resolutions. Do not compare a coarse square grid with a fine hexagonal grid and then attribute runtime or quality to lattice shape. Each resolution must preserve the same minimum clearance and pad-escape detail.
- Route the same net set. Use the same routing order or the same deterministic autorouter settings where possible. Save the resulting board files so manual edits can be distinguished from router output.
- Measure route quality. Record total copper length, number of bends, via count, failed connections, congestion hotspots, length-matching error, and any manual cleanup required. Report averages and outliers by net class rather than one favorable example.
- Measure search cost. Record elapsed time and peak memory on the same machine. A finer grid can increase search cost sharply, so include grid resolution and board size with every result.
- Run design-rule checks. Check width, clearance, annular or via-related rules, drills, and layer-specific constraints. Resolve violations before comparing geometry.
- Check fabrication limits. Confirm that the configured rules match the intended manufacturer’s capabilities. A DRC-clean board can still use dimensions the fabricator will not accept.
- Repeat on representative cases. Include dense fine-pitch areas, large through-hole parts, long buses, angled mechanical regions, and boards with substantial copper pours. One board cannot establish a general advantage.
When a square grid is the sensible default
- Orthogonal component placement: Most footprints, connectors, and board outlines use horizontal and vertical references.
- Conventional escape routing: Fine-pitch devices often need predictable rows and columns of breakout channels.
- Shared team standards: A common square grid makes placement, review, measurement, and library maintenance easier.
- Coarse or moderate-density boards: The extra directional option of a hexagonal lattice may not solve a real bottleneck.
- Tool support is uncertain: A well-understood square workflow is safer than assuming an EDA setting represents a true hexagonal router.
A square grid is not a requirement that every final segment be horizontal or vertical. Depending on the tool, interactive routing or topological autorouting can produce other angles while retaining a square placement convention.
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When a hexagonal experiment may be justified
- Angles are intrinsic to the design: The board contains repeated 60-degree geometry, radial structures, or connectors arranged around angled features.
- Orthogonal corridors are the bottleneck: A measured test shows that horizontal and vertical paths create avoidable detours or bends.
- The router can represent the lattice explicitly: You can verify the search directions, coordinate transformation, output geometry, and DRC behavior rather than inferring them from a snap icon.
- You can preserve pad access: The chosen resolution places every critical pad and via within a usable route channel.
- You will validate fabrication: Angled segments, clearances, drills, and any unusual geometry are accepted by the intended manufacturing process.
These are reasons to test, not proof that a hexagonal lattice will win. The decision should follow measured route quality and engineering constraints.
Common mistakes and how to correct them
Assuming six directions means six usable escape paths
Six neighboring lattice points do not create six open channels around a pad. Adjacent pads, solder-mask rules, courtyard boundaries, and copper clearances may block most of them. Inspect the complete pad neighborhood after applying actual widths and clearances.
Comparing visual smoothness instead of copper metrics
A route can look straighter on a hexagonal display while being longer after bends, detours, or layer changes are counted. Export both results and calculate length, bends, vias, failures, and manual edits.
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Using a finer grid to compensate for poor alignment
Finer resolution can reveal more candidate points, but Autodesk’s guidance warns that routing time rises exponentially with grid resolution. First correct footprint placement and pad-grid relationships; then increase resolution only as much as the rules require.
Treating DRC as a fabrication approval
DRC checks the project’s configured rules. It does not know whether those values reflect the selected fabricator unless you entered them from the manufacturer’s current specifications. Verify drills, clearances, trace widths, and any special angle or impedance requirements separately.
Equating snap behavior with autorouter behavior
Turning snapping off in KiCad 8.0, for example, changes interactive cursor placement. It does not demonstrate that the autorouter uses a hexagonal lattice. Record each control independently and inspect the generated board geometry.
A practical decision procedure
For a new project, use this sequence:
- Start with the square grid and a resolution that represents the smallest pad pitch and required clearance without unnecessary search cost.
- Set trace widths, clearances, via dimensions, drills, and layer rules from the intended fabrication process.
- Route a representative dense section, not just an empty area. Note failed escapes, bends, vias, and manual intervention.
- Only if a specific, measured bottleneck remains, create a controlled hexagonal test with the same physical constraints.
- Keep the hexagonal approach only when it improves the metrics that matter for your board and remains maintainable in the team’s EDA workflow.
Verdict
Choose a square grid as the default for conventional PCB routing because it aligns naturally with common pads, packages, board mechanics, and established workflows. Consider a hexagonal lattice as a specialized experiment when the design contains genuine 60-degree geometry or when measured orthogonal detours are a problem. Geometry alone cannot establish a performance advantage: the available evidence contains no direct, controlled statistic showing that hexagonal routing shortens traces, reduces vias, lowers congestion, improves manufacturing yield, or routes faster. The reliable choice is the one that reaches every pad under identical design rules with acceptable route quality, runtime, and fabrication margins.
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