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No. An SSD can expand the usable capacity of an AI system by holding model weights, datasets, checkpoints, or inference KV-cache data that do not fit in GPU memory or host DRAM. It cannot replace DRAM or GPU HBM as the fast, active working memory used during computation. Every item placed on an SSD must be transferred through an interconnect into memory before the processor or GPU can use it, and those transfers add latency and consume bandwidth.

The practical design is a tiered hierarchy: keep the hottest working data in GPU HBM, the next tier in host DRAM or an appropriate CXL memory device, and use NVMe SSDs for capacity expansion and deliberate offload. Whether that design works well depends on the access pattern, software support, interconnect, transfer frequency, endurance and total system cost.

What “replace DRAM” would mean in an AI system

DRAM and an NVMe SSD are not interchangeable components. DRAM is addressable working memory: CPUs can load from it directly, and software can move data between host DRAM and GPU HBM over the system’s memory and data fabrics. An SSD is persistent block storage. The operating system or an accelerator framework must issue I/O requests, receive blocks, and copy or map the results into memory before compute can proceed.

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That distinction matters most when a workload repeatedly touches a large active set. If a training step or inference request needs data that is still on the SSD, the accelerator waits for storage I/O and transfer. If the data is read once and then reused for a long time, the capacity benefit can outweigh the setup cost. If the data is fetched for nearly every operation, storage becomes a bottleneck rather than a memory substitute.

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Tier Primary role What happens when capacity is exceeded Important qualification
GPU HBM Closest working memory for GPU kernels, active model state and frequently used tensors Data must be moved to another tier, reducing effective compute throughput Capacity is fixed by the GPU configuration
Host DRAM Larger CPU-side memory tier and staging area for GPU transfers Data can be moved to storage or another memory tier It remains memory, not NVMe block storage; no universal DRAM-to-HBM ratio is established here
CXL memory Memory expansion or pooling over the Compute Express Link interconnect Hardware or software tiering determines which data stays local Microsoft Research reports higher latency than local DRAM, with results dependent on contention and access pattern
NVMe SSD Durable, scalable capacity for datasets, weights, checkpoints and deliberate offload Software fetches blocks into memory before use It is a storage tier, not a direct replacement for DRAM or HBM

NVIDIA’s technical guidance describes GPU memory as the closest tier and warns that when a GPU traverses the data fabric to internal or external storage for any part of a model or dataset, swapping to disk substantially reduces training performance. That is why “SSD as extra capacity” is a more accurate description than “SSD replacing DRAM.”

Why an SSD cannot serve as active DRAM

Storage I/O adds a transfer path

A DRAM load is part of the processor’s memory-access path. An SSD request involves a storage controller, queues, PCIe traffic, flash translation and a copy or mapping operation. Even a fast PCIe SSD therefore exposes a fundamentally different access path from local memory. The relevant question is not only the drive’s advertised sequential bandwidth; it is how often the application must cross that path while kernels are waiting.

Random and repeated access are especially expensive

Large sequential reads can make efficient use of an SSD. Small, scattered reads or repeated eviction and refetch cycles add queueing and software overhead. A workload with a working set larger than HBM can still run, but its throughput may be governed by the fraction of data that must be fetched for each step. More capacity does not remove that movement.

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Swapping can stall training

When the system treats storage as emergency virtual memory and continually swaps pages, the GPU may sit idle while data moves. NVIDIA explicitly associates disk swapping with substantially lower training performance. The penalty is workload-specific, so a storage device’s peak benchmark cannot predict end-to-end training speed.

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Durability does not equal suitability

Non-volatile storage is valuable for restarting jobs and retaining large files, but AI offload can create sustained reads, writes and metadata traffic. Endurance, thermal behavior, queue-depth performance and failure handling must be evaluated for the actual workload rather than inferred from a consumer drive’s headline specification.

Where SSD offload is useful

Model weights that do not fit in accelerator memory

Inference systems can keep portions of model weights on NVMe and stream them into host or GPU memory as layers execute. This makes a larger model deployable on a constrained accelerator, but the framework must schedule transfers and overlap them with computation. If layer movement cannot be hidden, latency and throughput fall.

Inference KV caches

Long-context and high-concurrency inference can consume substantial key-value cache capacity. IBM Research analyzed I/O traces from DeepSpeed and FlexGen workloads in which model data and KV-cache content were offloaded to NVMe SSDs. In those studied traces, average read bandwidth was 2.0 GiB/s and average write bandwidth was 11.0 MiB/s; 128 KiB requests dominated the block-layer workload. IBM also reported that “model offloading does not saturate NVMe SSDs” for the tested traces. Those numbers characterize the specific frameworks and traces, not every SSD, model or serving stack.

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Datasets, checkpoints and staging files

Training datasets and checkpoints generally spend most of their life outside the active compute loop. NVMe storage can provide local capacity for shuffling, preprocessing, checkpoint retention and restart. The SSD is helpful here because the data is read in larger batches or written at controlled synchronization points, rather than used as a per-instruction memory.

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Capacity expansion for experiments

Offload can let a team test a larger model or context window without immediately buying a larger GPU. It is a capacity and scheduling technique, not a promise that the resulting system will match one with enough HBM and DRAM to keep the working set resident.

How an NVMe offload path works

  1. Measure the working set. Record model-weight size, activation and optimizer-state requirements, expected KV-cache growth, batch size, context length and concurrency. Separate data that is reused every step from data that is read once.
  2. Choose the resident tiers. Keep latency-sensitive tensors and frequently reused weights in HBM where possible. Use host DRAM for staging and reuse. Reserve SSD capacity for cold or overflow data instead of allowing uncontrolled operating-system swapping.
  3. Use framework-supported offload. DeepSpeed and FlexGen are examples of software that can orchestrate model-data movement; inference stacks such as vLLM with LMCache have also been evaluated for KV-cache offload. Confirm the exact feature, version and device support in the software documentation for your deployment.
  4. Define movement and eviction policy. A useful policy prefetches blocks before a layer or request needs them, retains frequently reused data, and evicts cold data. Without a policy, the system can repeatedly fetch the same blocks and lose most of the benefit.
  5. Place storage on an adequate path. Verify PCIe generation and lane allocation, NUMA locality, CPU-to-GPU topology, available DRAM and cooling. A drive behind a congested bus or remote NUMA node may underperform even when its specification is higher.
  6. Measure end-to-end behavior. Track GPU utilization, step time or tokens per second, I/O queue depth, read and write bandwidth, request-size distribution, page faults, host-memory pressure and SSD temperature. Compare the same workload with and without offload; do not rely on a synthetic sequential benchmark.
  7. Set recovery limits. Keep checkpoints and source data in a durable location, define what happens when the SSD fills, and test restart behavior. Capacity expansion is not a substitute for backup or failure recovery.

SSD, DRAM and CXL: how the alternatives compare

Option Capacity advantage Latency and bandwidth behavior Best fit Main risk
More GPU HBM Expands the resident accelerator working set Closest to GPU compute Training and inference with heavily reused tensors Usually requires a different GPU configuration
More host DRAM Provides a larger CPU-side staging tier Faster access than storage, but transfers to GPU still cost time Prefetching, CPU preprocessing and overflow from HBM Does not remove GPU-memory capacity limits
CXL memory expansion Can add or pool memory without treating it as a block device Microsoft Research says access is slower than local DRAM; hardware-managed tiering was near regular DRAM for many tested workloads, with outliers Systems designed for memory expansion or pooling Contention and conflicting access patterns can cause significant slowdowns
NVMe SSD offload Large, persistent and comparatively low-cost capacity Requires I/O and data movement; behavior depends strongly on request pattern Cold weights, KV-cache overflow, datasets and checkpoints Frequent fetches can stall compute and increase wear

Microsoft Research reported no more than 5% degradation for more than 82% of workloads in a full-system prototype using Intel Flat Memory Mode and hardware-managed CXL tiering, while outlier workloads saw degradation of up to 34%. These percentages apply to that prototype and tested workload set, not to all CXL devices or AI applications.

CXL memory should not be confused with a CXL-attached SSD. A September 20, 2026 arXiv preprint found the stock CXL-SSD in its test setup was about three times slower than local DRAM and no faster than an NVMe SSD. That result is specific to the authors’ platform; its proposed chunk-aware method is not a commercial product recommendation.

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Samsung Semiconductor describes an inference KV-cache evaluation using NVIDIA RTX PRO 6000 Blackwell GPUs, a 1 TB CXL memory pool, vLLM and LMCache. Its description notes that SSD and network-attached-memory offload can address capacity limits while adding latency and bandwidth overhead. The evaluation is tied to that design and should not be treated as a universal industry benchmark.

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Decision framework for an AI deployment

Evaluate the complete system against these questions:

  • How much capacity is missing? If only a small overflow must be held, additional DRAM or a modest memory-expansion tier may be more effective than frequent SSD transfers.
  • What is the access pattern? Sequential dataset scans favor storage. Repeated random access to a hot working set favors HBM or DRAM.
  • What fraction is active? Offload works best when most data is cold and only a predictable subset must be resident at one time.
  • Can software overlap movement with compute? Framework prefetching, caching, batching and eviction determine whether the SSD’s latency is visible to the accelerator.
  • Which interconnect is available? Check PCIe lanes, NUMA placement, GPU topology, CXL support and any network path. The device cannot exceed the slowest link in the transfer chain.
  • What is the write intensity? KV-cache eviction, optimizer-state movement and checkpointing can produce different endurance demands. Match the drive’s rated endurance and thermal design to sustained operation.
  • What is the full-system cost? Include GPU, DRAM, CXL hardware, SSDs, host platform, cooling, power, software engineering and the cost of lower throughput or higher latency.
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Common failure modes and fixes

GPU utilization collapses after enabling offload

Check whether transfers occur on the critical path. Increase prefetch distance, retain hotter blocks in DRAM, reduce concurrency that causes cache thrashing, or move the hottest subset back to HBM. If the working set is uniformly active, more storage capacity will not solve the bottleneck.

The SSD shows low utilization but the job is slow

Average bandwidth can hide small requests, high latency or software serialization. Inspect request sizes and queue depth, then check CPU overhead, NUMA placement and PCIe topology. IBM’s 128 KiB request observation illustrates why a drive’s maximum sequential number is not a complete diagnosis.

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The SSD is saturated by writes

Separate checkpoint traffic from serving traffic, batch small writes, reduce unnecessary KV-cache churn and monitor write amplification and temperature. An endurance-rated device and adequate cooling may be required for sustained production workloads.

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Adding CXL does not produce the expected gain

Verify that the application and operating system actually use the CXL tier, then test contention and access locality. The Microsoft results show that conflicting patterns can create outliers even when average behavior is close to local DRAM.

The system runs out of capacity

Set alerts before the SSD reaches its limit, reserve space for checkpoints and logs, and define an eviction or retention policy. An offload design without capacity governance eventually turns an application-level cache into an outage.

NVMe standards and compatibility checks

NVM Express describes NVMe as an industry-standard interface for PCIe SSDs across multiple form factors. NVMe 2.4 was released on August 4, 2026, and Base Specification Revision 2.4 was ratified on July 31, 2026. A current specification establishes the interface context; it does not guarantee that a particular drive is suitable for AI offload.

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Before selecting hardware, verify the SSD’s capacity, NVMe and PCIe compatibility, form factor, sustained—not just burst—performance, endurance rating, thermal behavior, firmware support and host lane allocation. Confirm that the GPU platform, motherboard, operating system and offload framework support the intended topology. Product-level prices, availability and universal benchmark rankings cannot be inferred from the workload studies above.

Bottom line for training and inference

An SSD can make an AI system capable of holding more data than its HBM and DRAM allow, and deliberate offload is a real technique used for model weights and KV caches. It is most valuable when data is cold, access is predictable and software can overlap transfers with useful computation. It is a poor substitute for DRAM when the workload repeatedly needs the entire working set at low latency. Design SSDs as a secondary capacity tier, measure the complete data path, and choose HBM, DRAM or CXL memory for data that must remain actively available.

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