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Homebrew designs vary in processor, voltage rails, memory map, and reset behavior. Use your board’s schematic and the datasheets for its exact components as the authority; do not apply one CPU’s timing or pin behavior to another architecture.
First, define the failure and record the build
Write down the processor marking, ROM and RAM part numbers, clock source, power source, and schematic revision. Note whether the computer ever worked and exactly what happens now: power-indicator behavior, display or serial output, whether reset changes anything, measured clock or bus activity, unusual heat, and any repeated resets. A recent wiring, component, or firmware change can help narrow the fault.
Separate the symptom into a stage rather than treating “no output” as proof that the CPU failed to start. A powered board may have no clock; a clocked CPU may be held in reset; a running program may simply fail to reach its output device. Ben Eater’s 6502 project materials illustrate why it matters to diagnose against a particular schematic and component set: that reference design’s details apply to that build, not to every homebrew computer.
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1. Inspect wiring and connections with power off
Disconnect power before reseating ICs or checking continuity. Compare the physical board with its own schematic, then inspect:
- Pin-1 orientation, notches, and IC placement.
- Supply-rail polarity, ground connections, and connector orientation.
- Misplaced or loose wires, solder bridges, and connections that may have been disturbed during the last change.
Use resistance or continuity mode only on an unpowered board. A reference schematic can help you understand how much detail to check, but do not copy another design’s wiring assumptions.
2. Verify power at the processor and memory
With power on, measure ground-to-supply at the processor and memory IC pins with a digital multimeter, and compare the readings with those chips’ datasheets and the board’s design. A normal-looking reading at the power connector does not prove that voltage reaches the ICs: a poor rail connection or voltage drop elsewhere on the board can leave a chip underpowered. Watch for an unstable reading or an intermittent connection.
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Follow safe measurement practice and avoid letting a probe bridge adjacent pins. Ben Eater’s power-supply discussion describes multiwire power distribution and notes that a multimeter can be adequate for troubleshooting that slow computer; that observation is specific to its project and does not establish the right instrument for every board.
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Confirm that the clock reaches the processor and behaves as the selected design expects. Then check the reset pin during power-up and after pressing the reset control. If reset remains asserted, inspect its polarity, switch wiring, pull-up or pull-down components, and reset-pulse circuit. Also consider whether the supply reaches operating voltage before reset is released. Use the exact processor datasheet: reset polarity and timing are not universal.
W65C02S-specific reset behavior
For the WDC W65C02S only, Western Design Center’s 2024 datasheet says, “The Reset (RESB) input is used to initialize the microprocessor and start program execution.” The datasheet requires RESB to be low for at least two clock cycles after VDD reaches operating voltage. Following a positive edge, the W65C02S performs a seven-clock reset sequence and loads the program counter from the reset vector at $FFFC (low byte) and $FFFD (high byte). These are specifications for that part, not rules for other 6502 variants, Z80s, 6809s, or custom CPUs.
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4. Look for bus activity and verify the ROM path
If clock and reset appear correct, check whether the address, data, and read/write signals change as the chosen CPU’s datasheet predicts. A static reading from a multimeter or a logic probe may show a level without revealing transitions; use an instrument suited to the timing question when activity matters.
If the CPU shows activity but does not execute the intended code, trace the path from the processor to the ROM against the schematic:
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- Check that the ROM’s address, chip-select, and output-enable connections match the design.
- Confirm that the address decode enables the ROM at the addresses where the CPU expects to fetch instructions.
- For a W65C02S design, inspect the bytes at $FFFC and $FFFD and verify that they point to the intended startup code.
- Compare bus wiring and memory timing with the processor and memory datasheets.
Ben Eater’s 8-bit project provides schematics and component datasheets for its own design; WDC’s W65C02S datasheet specifies that processor’s reset-vector behavior. Use those materials only when they match the hardware being debugged.
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5. Check RAM and simplify the configuration
Once the processor can fetch from ROM, determine whether the failure involves RAM or another device on the bus. If the board supports it, reduce the system to the components genuinely required to fetch and execute the first instruction: CPU, clock and reset, required ROM, and only the minimum memory and output needed by that design. Remove nonessential peripherals or bus attachments, then add them back one at a time.
Do not remove a component the particular CPU needs to start, and do not assume that every design can boot without RAM. Use the board’s memory map and schematic to decide what is essential. A fault that appears only after adding one device points toward that device, its loading or wiring, or its configuration.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.6. If code runs, trace the output path
A blank LCD, VGA display, or serial terminal can be a downstream fault rather than a CPU startup failure. Check the output device’s power and connections, address decode and chip select, interface timing, and—for serial—baud rate and data format. Also verify that the running firmware is configured to send output at all. A debug LED or monitor can help distinguish execution from a failure confined to the display or communications path.
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For example, Ben Eater’s 6502 reference design includes ROM, RAM, and a VIA; a serial variant also uses an ACIA. A fault in one of those subsystems does not by itself show that the entire computer is inactive.
Choose a tool for the question you need to answer
| Tool | What it can establish | When it is useful |
|---|---|---|
| Digital multimeter | DC voltage and, on an unpowered board, continuity or resistance. | Checking supply at IC pins, ground continuity, and suspected wiring faults. |
| Logic probe | Logic levels or observed state changes, depending on the probe. | Checking whether a signal appears high, low, or active without needing a full timing trace. |
| Oscilloscope | Signal waveforms and timing over time. | Investigating clock, reset, or bus transitions when static readings cannot answer the question. |
| Logic analyzer | Multiple digital signal transitions captured over time. | Examining address, data, and control activity together, provided the analyzer and probes suit the signal and voltage levels. |
No instrument is universally best for an unspecified build. Check input limits, voltage range, probe compatibility, and—where relevant—bandwidth or sample rate and channel count. Confirm that it is safe to connect the instrument directly to the signal.
7. Replace or reprogram parts only after narrowing the fault
Replace a chip only when measurements point to it. Match the exact part or a verified compatible variant, including package and pinout, voltage and timing requirements, and compatibility with the rest of the bus. A CPU swap is not a useful first diagnostic step when power, reset, clock, ROM selection, or wiring remain unchecked.
If ROM contents are suspect, an EEPROM programmer may help verify or rewrite the chip, but support depends on the exact memory part. Ben Eater’s project notes mention programmers including the TL866II Plus and T48; that does not establish compatibility with every EEPROM. Check the programmer’s supported-chip list, any required package adapter, voltage support, and software or operating-system requirements before connecting the memory.
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