EEMBC’s ULPMark benchmark family tests several distinct aspects of microcontroller energy use—not one universal measure of “low power.” Its profiles cover energy during a low-duty-cycle sleep-and-wake workload, the impact of selected peripherals during deep sleep, and energy efficiency while running active computation. Which result matters depends on what your MCU must do.
What does EEMBC ULPMark test?
ULPBench is the older name commonly associated with this work; EEMBC’s current materials call the benchmark family ULPMark. EEMBC says a single datasheet figure cannot capture the tradeoffs among sleep, peripheral activity, computation, and performance. The family therefore uses separate profiles for separate questions.
| Profile | What it measures | Useful comparison question |
|---|---|---|
| ULPMark-CoreProfile | Core sleep energy and transitions to and from active mode in a low-duty-cycle workload. | How much energy does the MCU use for this specified sleepy-node cycle? |
| ULPMark-PeripheralProfile | The deep-sleep energy impact of RTC, PWM, ADC, and SPI peripherals. | What energy cost do these peripheral functions add in the tested low-power scenario? |
| ULPMark-CoreMark | Energy efficiency during active computation, using CoreMark as the workload, alongside performance. | How much CoreMark work does the MCU perform per unit of energy at a stated operating point? |
EEMBC dates the introductions of CoreProfile, PeripheralProfile, and CoreMark to 2014, 2016, and 2019, respectively. EEMBC’s ULPMark overview describes the family as quantifying “the many aspects of ultra-low power MCUs.”
Is CoreProfile just measuring sleep current?
No. CoreProfile measures a defined duty cycle that combines extended inactivity with brief processing, rather than reporting only a static sleep-current reading. EEMBC describes a one-second cycle in which active work takes about 3% of total runtime. The listed work includes generating 20 GPIO pulses, interpolation, integration and filtering, LCD conversion, string search, a small bubble sort, and bit permutation.
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The method also accounts for retention RAM costs: preserving state through sleep uses energy. That makes CoreProfile more representative of its specified sleep-and-wake workload than a bare sleep-current figure, but it remains a benchmark workload, not a prediction of battery life in a particular product.
How is a CoreProfile score calculated?
EEMBC calculates the public CoreProfile score from the inverse of average power in microwatts over 50 iterations, multiplied by 1,000. A higher score therefore means lower measured average power under this profile. EEMBC reports scores to three significant figures and states a ±3% run-to-run tolerance; small differences near that tolerance should not be treated as proof of a stable practical advantage.
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For the formula and the live results, see EEMBC’s ULPMark-CoreProfile scores page. Its public table is useful but not exhaustive: score uploads are not mandatory, and many scores generated internally are not listed. Certification is a separate status. EEMBC says certified scores are analyzed by its Certification Lab against official run-rules; certification is a member benefit. License holders must upload a score before using it publicly, but uploading is otherwise optional.
How should you compare MCU low-power scores?
Compare like with like: the same profile answers the same kind of question. A CoreProfile score is not interchangeable with a PeripheralProfile or CoreMark result. When reviewing CoreProfile entries, inspect certified status and the listed test conditions rather than ranking by score alone.
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- Check the voltage and MCU core, along with compiler details where shown.
- Note whether an external DC/DC converter was used.
- Review retention SRAM and other displayed conditions that can affect energy use.
- Interpret close score differences in light of EEMBC’s stated ±3% run-to-run tolerance.
These details matter because a score describes a particular run under specified conditions; changing voltage, power conversion, retained memory, or software can change the result.
What does ULPMark-CoreMark tell you about active efficiency?
CoreMark addresses a different problem from a sleepy-node duty cycle: how efficiently an MCU performs active work. EEMBC reports energy efficiency as CoreMark iterations per milli-joule and presents it alongside iterations per second. The paired figures show the tradeoff between doing work efficiently and doing it quickly.
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EEMBC defines three operating configurations: best-case performance, best-case energy efficiency at the lowest voltage, and energy efficiency at 3 V. Treat each result as an operating point, not a standalone ranking. A device with a stronger energy-efficiency figure may run the workload more slowly, so the corresponding performance and test conditions belong in any comparison. Details are on EEMBC’s ULPMark-CoreMark page.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What do you need to run the benchmark?
EEMBC identifies STMicroelectronics PowerShield as the measurement backbone for its framework. EEMBC describes sub-100 nJ accuracy on a desktop for around US$100; that is EEMBC’s published claim, not an independently verified current retail price or guarantee of present availability. Measurement accuracy depends on the setup, so consult EEMBC’s current framework information before choosing hardware.
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EEMBC says obtaining and running ULPMark requires a license, and its overview describes corporate and academic licensing. Terms can change; check EEMBC’s official ULPMark information for current licensing details. To reproduce a workload, you will also need an MCU development setup suited to the target device and firmware, but the benchmark score alone does not establish compatibility with a particular board or measurement instrument.
What a ULPMark score cannot tell you
A benchmark score supports a comparison only for its defined workload and conditions. It does not by itself establish battery life for an application with different sensor sampling, radio use, software activity, or wake intervals, nor does it settle every system-level power question. Use the profile that resembles the MCU’s relevant work, then assess the complete application’s energy behavior under its actual operating pattern.
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